> configure(npc)
ysyx_22040000 李心杨 Linux calcite 6.6.19 #1-NixOS SMP PREEMPT_DYNAMIC Fri Mar 1 12:35:11 UTC 2024 x86_64 GNU/Linux 11:54:52 up 2 days 2:45, 2 users, load average: 2.66, 1.60, 1.17
This commit is contained in:
tracer-ysyx
parent
705ee17b3c
commit
f7f19ed102
9 changed files with 257 additions and 133 deletions
|
|
@ -7,99 +7,64 @@ import chiseltest.simulator.WriteVcdAnnotation
|
|||
|
||||
import npc.util._
|
||||
|
||||
class RegisterFileSpec extends AnyFreeSpec with ChiselScalatestTester {
|
||||
"RegisterFile should work" - {
|
||||
"with 2 read ports" in {
|
||||
test(new RegisterFile(2)) { c =>
|
||||
def readExpect(addr: Int, value: Int, port: Int = 0): Unit = {
|
||||
c.io.readAddr(port).poke(addr.U)
|
||||
c.io.readData(port).expect(value.U)
|
||||
}
|
||||
def write(addr: Int, value: Int): Unit = {
|
||||
c.io.writeEnable.poke(true.B)
|
||||
c.io.writeData.poke(value.U)
|
||||
c.io.writeAddr.poke(addr.U)
|
||||
c.clock.step(1)
|
||||
c.io.writeEnable.poke(false.B)
|
||||
}
|
||||
// everything should be 0 on init
|
||||
for (i <- 0 until 32) {
|
||||
readExpect(i, 0, port = 0)
|
||||
readExpect(i, 0, port = 1)
|
||||
}
|
||||
|
||||
// write 5 * addr + 3
|
||||
for (i <- 0 until 32) {
|
||||
write(i, 5 * i + 3)
|
||||
}
|
||||
|
||||
// check that the writes worked
|
||||
for (i <- 0 until 32) {
|
||||
readExpect(i, if (i == 0) 0 else 5 * i + 3, port = i % 2)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
class ALUGeneratorSpec extends AnyFreeSpec with ChiselScalatestTester {
|
||||
"With 32 width, " - {
|
||||
val neg = (x: BigInt) => BigInt("FFFFFFFF", 16) - x + 1
|
||||
val not = (x: BigInt) => x ^ BigInt("FFFFFFFF", 16)
|
||||
val mask = BigInt("FFFFFFFF", 16)
|
||||
val oprands: List[(BigInt, BigInt)] = List(
|
||||
(5, 3), (101010, 101010), (0xFFFFFFFCL, 0xFFFFFFFFL), (4264115, 2)
|
||||
)
|
||||
val operations: Map[Int, (BigInt, BigInt) => BigInt] = Map(
|
||||
0 -> ((a: BigInt, b: BigInt) => (a + b) & mask),
|
||||
1 -> ((a: BigInt, b: BigInt) => (a + neg(b)) & mask),
|
||||
2 -> ((a, _) => not(a)),
|
||||
3 -> (_ & _),
|
||||
4 -> (_ | _),
|
||||
5 -> (_ ^ _),
|
||||
6 -> ((a, b) => if (a < b) 1 else 0),
|
||||
7 -> ((a, b) => if (a == b) 1 else 0),
|
||||
)
|
||||
val validate = (c: ALUGenerator,op: Int, oprands: List[(BigInt, BigInt)]) => {
|
||||
c.io.op.poke(op.U)
|
||||
oprands.foreach({ case (a, b) =>
|
||||
c.io.a.poke(a.U)
|
||||
c.io.b.poke(b.U)
|
||||
c.io.out.expect(operations(op)(a, b))
|
||||
})
|
||||
}
|
||||
"add should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 0, oprands) }
|
||||
}
|
||||
"sub should work" - {
|
||||
"with positive result" in {
|
||||
test(new ALUGenerator(32)) { c =>
|
||||
validate(c, 1, oprands.filter({case (a, b) => a >= b}))
|
||||
}
|
||||
}
|
||||
"with negative result" in {
|
||||
test(new ALUGenerator(32)) { c =>
|
||||
validate(c, 1, oprands.filter({case (a, b) => a < b}))
|
||||
}
|
||||
}
|
||||
}
|
||||
"not should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 2, oprands) }
|
||||
}
|
||||
"and should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 3, oprands) }
|
||||
}
|
||||
"or should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 4, oprands) }
|
||||
}
|
||||
"xor should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 5, oprands) }
|
||||
}
|
||||
"compare should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 6, oprands) }
|
||||
}
|
||||
"equal should work" in {
|
||||
test(new ALUGenerator(32)) { c => validate(c, 7, oprands) }
|
||||
}
|
||||
}
|
||||
}
|
||||
// class ALUGeneratorSpec extends AnyFreeSpec with ChiselScalatestTester {
|
||||
// "With 32 width, " - {
|
||||
// val neg = (x: BigInt) => BigInt("FFFFFFFF", 16) - x + 1
|
||||
// val not = (x: BigInt) => x ^ BigInt("FFFFFFFF", 16)
|
||||
// val mask = BigInt("FFFFFFFF", 16)
|
||||
// val oprands: List[(BigInt, BigInt)] = List(
|
||||
// (5, 3), (101010, 101010), (0xFFFFFFFCL, 0xFFFFFFFFL), (4264115, 2)
|
||||
// )
|
||||
// val operations: Map[Int, (BigInt, BigInt) => BigInt] = Map(
|
||||
// 0 -> ((a: BigInt, b: BigInt) => (a + b) & mask),
|
||||
// 1 -> ((a: BigInt, b: BigInt) => (a + neg(b)) & mask),
|
||||
// 2 -> ((a, _) => not(a)),
|
||||
// 3 -> (_ & _),
|
||||
// 4 -> (_ | _),
|
||||
// 5 -> (_ ^ _),
|
||||
// 6 -> ((a, b) => if (a < b) 1 else 0),
|
||||
// 7 -> ((a, b) => if (a == b) 1 else 0),
|
||||
// )
|
||||
// val validate = (c: ALUGenerator[32], op: Int, oprands: List[(BigInt, BigInt)]) => {
|
||||
// c.io.op.poke(op.U)
|
||||
// oprands.foreach({ case (a, b) =>
|
||||
// c.io.a.poke(a.U)
|
||||
// c.io.b.poke(b.U)
|
||||
// c.io.out.expect(operations(op)(a, b))
|
||||
// })
|
||||
// }
|
||||
// "add should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 0, oprands) }
|
||||
// }
|
||||
// "sub should work" - {
|
||||
// "with positive result" in {
|
||||
// test(new ALUGenerator(32)) { c =>
|
||||
// validate(c, 1, oprands.filter({case (a, b) => a >= b}))
|
||||
// }
|
||||
// }
|
||||
// "with negative result" in {
|
||||
// test(new ALUGenerator(32)) { c =>
|
||||
// validate(c, 1, oprands.filter({case (a, b) => a < b}))
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// "not should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 2, oprands) }
|
||||
// }
|
||||
// "and should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 3, oprands) }
|
||||
// }
|
||||
// "or should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 4, oprands) }
|
||||
// }
|
||||
// "xor should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 5, oprands) }
|
||||
// }
|
||||
// "compare should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 6, oprands) }
|
||||
// }
|
||||
// "equal should work" in {
|
||||
// test(new ALUGenerator(32)) { c => validate(c, 7, oprands) }
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
|
|
|
|||
29
npc/core/src/test/scala/RegisterFile.scala
Normal file
29
npc/core/src/test/scala/RegisterFile.scala
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
package flowpc
|
||||
|
||||
import chisel3._
|
||||
import chiseltest._
|
||||
import org.scalatest.freespec.AnyFreeSpec
|
||||
import chiseltest.simulator.WriteVcdAnnotation
|
||||
|
||||
import flowpc.components._
|
||||
|
||||
class RegisterFileSpec extends AnyFreeSpec with ChiselScalatestTester {
|
||||
"RegisterFileCore" - {
|
||||
"(0) is always 0" - {
|
||||
// val reg = new RegisterFileCore(32, UInt(32.W), 2)
|
||||
test(new RegisterFileCore(32, UInt(32.W), 2)).withAnnotations(Seq(WriteVcdAnnotation)) { c =>
|
||||
c.readPorts(0).addr.poke(0)
|
||||
c.readPorts(1).addr.poke(0)
|
||||
c.writePort.enable.poke(true)
|
||||
c.writePort.addr.poke(0)
|
||||
c.writePort.data.poke(0xdeadbeef)
|
||||
|
||||
c.readPorts(0).data.expect(0)
|
||||
c.readPorts(1).data.expect(0)
|
||||
c.clock.step(1)
|
||||
c.readPorts(0).data.expect(0)
|
||||
c.readPorts(1).data.expect(0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue