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ysyx_22040000 李心杨
 Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
  00:40:41  up 1 day  9:27,  2 users,  load average: 0.35, 0.36, 0.37
This commit is contained in:
tracer-ysyx 2024-01-06 00:40:41 +08:00 • committed by xinyangli
parent 0e11c2e0fb
commit f0ce5198cf
13 changed files with 271 additions and 137 deletions
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24
npc/csrc/main.cpp
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@ -3,14 +3,14 @@
#include <cstdlib>
#include <verilated.h>
#include <verilated_vcd_c.h>
#include <VMain.h>
#include <VSwitch.h>
const int MAX_SIM_TIME=100;
int main(int argc, char **argv, char **env) {
int sim_time = 0;
Verilated::commandArgs(argc, argv);
VMain *top = new VMain;
VSwitch *top = new VSwitch;
Verilated::traceEverOn(true);
VerilatedVcdC *m_trace = new VerilatedVcdC;
@ -18,16 +18,16 @@ int main(int argc, char **argv, char **env) {
top->trace(m_trace, 5);
m_trace->open("waveform.vcd");
#endif
// for (sim_time = 0; sim_time < MAX_SIM_TIME; sim_time++) {
// CData sw = rand() & 0b11;
// top->sw = sw;
// top->eval();
// printf("sw0 = %d, sw1 = %d, ledr = %d\n", sw & 0b1, sw >> 1, top->ledr);
// assert(top->ledr == ((sw >> 1) ^ (sw & 0b1)) );
// #ifdef VERILATOR_TRACE
// m_trace->dump(sim_time);
// #endif
// }
for (sim_time = 0; sim_time < MAX_SIM_TIME; sim_time++) {
top->io_sw_0 = rand() % 2;
top->io_sw_1 = rand() % 2;
top->eval();
printf("sw0 = %d, sw1 = %d, ledr = %d\n", top->io_sw_0, top->io_sw_1, top->io_out);
assert(top->io_out == (top->io_sw_0 ^ top->io_sw_1));
#ifdef VERILATOR_TRACE
m_trace->dump(sim_time);
#endif
}
#ifdef VERILATOR_TRACE
m_trace->close();
#endif