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ysyx_22040000 李心杨
Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
 13:29:52  up  22:08,  2 users,  load average: 1.26, 1.02, 1.00
This commit is contained in:
tracer-ysyx 2024-01-01 13:29:52 +08:00 • committed by xinyangli
parent 19e19610f8
commit e3d600fc21
5 changed files with 86 additions and 31 deletions
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29
npc/csrc/main.cpp
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@ -3,9 +3,12 @@
#include <cstdlib>
#include <verilated.h>
#include <verilated_vcd_c.h>
#include "Vexample.h"
#include <Vexample.h>
#include <nvboard.h>
#define MAX_SIM_TIME 100
const int MAX_SIM_TIME=100;
void nvboard_bind_all_pins(Vexample* top);
int main(int argc, char **argv, char **env) {
int sim_time = 0;
@ -14,19 +17,27 @@ int main(int argc, char **argv, char **env) {
Verilated::traceEverOn(true);
VerilatedVcdC *m_trace = new VerilatedVcdC;
nvboard_bind_all_pins(top);
nvboard_init();
#ifdef VERILATOR_TRACE
top->trace(m_trace, 5);
m_trace->open("waveform.vcd");
for (sim_time = 0; sim_time < MAX_SIM_TIME; sim_time++) {
int a = rand() & 1;
int b = rand() & 1;
top->a = a;
top->b = b;
#endif
// for (sim_time = 0; sim_time < MAX_SIM_TIME; sim_time++) {
while (true) {
nvboard_update();
// CData sw = rand() & 0b11;
// top->sw = sw;
top->eval();
printf("a = %d, b = %d, f = %d\n", a, b, top->f);
assert(top->f == (a ^ b));
// printf("sw0 = %d, sw1 = %d, ledr = %d\n", sw & 0b1, sw >> 1, top->ledr);
// assert(top->ledr == ((sw >> 1) ^ (sw & 0b1)) );
#ifdef VERILATOR_TRACE
m_trace->dump(sim_time);
#endif
}
#ifdef VERILATOR_TRACE
m_trace->close();
#endif
delete top;
exit(EXIT_SUCCESS);
}