npc: add cmake-format for verilate macro
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parent
de9f770d08
commit
d9efde7a44
5 changed files with 42 additions and 40 deletions
24
npc/.cmake-format
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24
npc/.cmake-format
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@ -0,0 +1,24 @@
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additional_commands = {
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"verilate": {
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"pargs": 1,
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"flags": [
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"COVERAGE",
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"SYSTEMC",
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"THREADS",
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"TRACE_THREADS",
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"TRACE",
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"TRACE_FST"
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],
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"kwargs": {
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"DIRECTORY": "?",
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"INCLUDE_DIRS": "*",
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"OPT_SLOW": "*",
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"OPT_FAST": "*",
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"OPT_GLOBAL": "*",
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"PREFIX": "?",
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"SOURCES": "+",
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"TOP_MODULE": "?",
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"VERILATOR_ARGS": "*",
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}
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}
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}
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@ -1,3 +1,3 @@
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set substitute-path /build/am-kernels /home/xin/repo/ysyx-workbench/am-kernels
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file /nix/store/g8hi9rlby6xm7grzcpfc8lpmdfgv1i92-am-kernel-riscv32-none-elf-2024-07-10/libexec/am-kernels/add
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target remote /tmp/gdbstub-npc.sock
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target remote gdbstub-npc.sock
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@ -1 +0,0 @@
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addSbtPlugin("ch.epfl.scala" % "sbt-bloop" % "1.5.2")
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@ -5,20 +5,12 @@ target_include_directories(V${TOPMODULE} PRIVATE ${CMAKE_SOURCE_DIR}/include)
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verilate(
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V${TOPMODULE}
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TRACE
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THREADS
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TOP_MODULE
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${TOPMODULE}
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PREFIX
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V${TOPMODULE}
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SOURCES
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${CHISEL_OUTPUT_TOPMODULE}
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${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS
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${CHISEL_OUTPUT_DIR}
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VERILATOR_ARGS
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"--vpi" # Enable VPI
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"-Wno-UNOPTFLAT")
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TRACE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS ${CHISEL_OUTPUT_DIR}
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VERILATOR_ARGS "--vpi" "-Wno-UNOPTFLAT")
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foreach(DIFFTEST_BINARY_FILE IN LISTS DIFFTEST_BINARY_FILES)
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get_filename_component(FILENAME ${DIFFTEST_BINARY_FILE} NAME_WE)
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@ -36,17 +28,9 @@ target_link_options(${TOPMODULE} PRIVATE -Wl,-E)
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verilate(
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${TOPMODULE}
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TRACE
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THREADS
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TOP_MODULE
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${TOPMODULE}
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PREFIX
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V${TOPMODULE}
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SOURCES
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${CHISEL_OUTPUT_TOPMODULE}
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${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS
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${CHISEL_OUTPUT_DIR}
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VERILATOR_ARGS
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"--vpi" # Enable VPI
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"-Wno-UNOPTFLAT")
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TRACE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS ${CHISEL_OUTPUT_DIR}
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VERILATOR_ARGS "--vpi" "-Wno-UNOPTFLAT")
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@ -11,16 +11,11 @@ add_executable(V${TOPMODULE}_nvboard
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verilate(
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V${TOPMODULE}_nvboard
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TRACE
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THREADS
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TOP_MODULE
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${TOPMODULE}
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PREFIX
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V${TOPMODULE}
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SOURCES
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${CHISEL_OUTPUT_TOPMODULE}
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INCLUDE_DIRS
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${CHISEL_OUTPUT_DIR})
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TRACE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE}
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INCLUDE_DIRS ${CHISEL_OUTPUT_DIR})
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target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR}
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${SDL2_INCLUDE_DIRS})
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