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create Makefile for example in verilator manual

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This commit is contained in:
xinyangli 2023-12-23 20:23:18 +08:00
parent f6803239c7
commit 97df569747
3 changed files with 64 additions and 10 deletions
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9
npc/vsrc/example.v
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@ -1,2 +1,7 @@
module example();
endmodule
module top(
input a,
input b,
output f
);
assign f = a ^ b;
endmodule