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NJU-ProjectN/abstract-machine ics2023 initialized

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NJU-ProjectN/abstract-machine 3348db971fd860be5cb28e21c18f9d0e65d0c96a Merge pull request #8 from Jasonyanyusong/master
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xinyangli 2023-12-21 00:20:42 +08:00
parent 2824efad33
commit 8e4feb4010
129 changed files with 9017 additions and 0 deletions
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81
abstract-machine/am/include/am.h Normal file
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#ifndef AM_H__
#define AM_H__
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include ARCH_H // this macro is defined in $CFLAGS
// examples: "arch/x86-qemu.h", "arch/native.h", ...
// Memory protection flags
#define MMAP_NONE 0x00000000 // no access
#define MMAP_READ 0x00000001 // can read
#define MMAP_WRITE 0x00000002 // can write
// Memory area for [@start, @end)
typedef struct {
void *start, *end;
} Area;
// Arch-dependent processor context
typedef struct Context Context;
// An event of type @event, caused by @cause of pointer @ref
typedef struct {
enum {
EVENT_NULL = 0,
EVENT_YIELD, EVENT_SYSCALL, EVENT_PAGEFAULT, EVENT_ERROR,
EVENT_IRQ_TIMER, EVENT_IRQ_IODEV,
} event;
uintptr_t cause, ref;
const char *msg;
} Event;
// A protected address space with user memory @area
// and arch-dependent @ptr
typedef struct {
int pgsize;
Area area;
void *ptr;
} AddrSpace;
#ifdef __cplusplus
extern "C" {
#endif
// ----------------------- TRM: Turing Machine -----------------------
extern Area heap;
void putch (char ch);
void halt (int code) __attribute__((__noreturn__));
// -------------------- IOE: Input/Output Devices --------------------
bool ioe_init (void);
void ioe_read (int reg, void *buf);
void ioe_write (int reg, void *buf);
#include "amdev.h"
// ---------- CTE: Interrupt Handling and Context Switching ----------
bool cte_init (Context *(*handler)(Event ev, Context *ctx));
void yield (void);
bool ienabled (void);
void iset (bool enable);
Context *kcontext (Area kstack, void (*entry)(void *), void *arg);
// ----------------------- VME: Virtual Memory -----------------------
bool vme_init (void *(*pgalloc)(int), void (*pgfree)(void *));
void protect (AddrSpace *as);
void unprotect (AddrSpace *as);
void map (AddrSpace *as, void *vaddr, void *paddr, int prot);
Context *ucontext (AddrSpace *as, Area kstack, void *entry);
// ---------------------- MPE: Multi-Processing ----------------------
bool mpe_init (void (*entry)());
int cpu_count (void);
int cpu_current (void);
int atomic_xchg (int *addr, int newval);
#ifdef __cplusplus
}
#endif
#endif

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abstract-machine/am/include/amdev.h Normal file
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#ifndef __AMDEV_H__
#define __AMDEV_H__
// **MAY SUBJECT TO CHANGE IN THE FUTURE**
#define AM_DEVREG(id, reg, perm, ...) \
enum { AM_##reg = (id) }; \
typedef struct { __VA_ARGS__; } AM_##reg##_T;
AM_DEVREG( 1, UART_CONFIG, RD, bool present);
AM_DEVREG( 2, UART_TX, WR, char data);
AM_DEVREG( 3, UART_RX, RD, char data);
AM_DEVREG( 4, TIMER_CONFIG, RD, bool present, has_rtc);
AM_DEVREG( 5, TIMER_RTC, RD, int year, month, day, hour, minute, second);
AM_DEVREG( 6, TIMER_UPTIME, RD, uint64_t us);
AM_DEVREG( 7, INPUT_CONFIG, RD, bool present);
AM_DEVREG( 8, INPUT_KEYBRD, RD, bool keydown; int keycode);
AM_DEVREG( 9, GPU_CONFIG, RD, bool present, has_accel; int width, height, vmemsz);
AM_DEVREG(10, GPU_STATUS, RD, bool ready);
AM_DEVREG(11, GPU_FBDRAW, WR, int x, y; void *pixels; int w, h; bool sync);
AM_DEVREG(12, GPU_MEMCPY, WR, uint32_t dest; void *src; int size);
AM_DEVREG(13, GPU_RENDER, WR, uint32_t root);
AM_DEVREG(14, AUDIO_CONFIG, RD, bool present; int bufsize);
AM_DEVREG(15, AUDIO_CTRL, WR, int freq, channels, samples);
AM_DEVREG(16, AUDIO_STATUS, RD, int count);
AM_DEVREG(17, AUDIO_PLAY, WR, Area buf);
AM_DEVREG(18, DISK_CONFIG, RD, bool present; int blksz, blkcnt);
AM_DEVREG(19, DISK_STATUS, RD, bool ready);
AM_DEVREG(20, DISK_BLKIO, WR, bool write; void *buf; int blkno, blkcnt);
AM_DEVREG(21, NET_CONFIG, RD, bool present);
AM_DEVREG(22, NET_STATUS, RD, int rx_len, tx_len);
AM_DEVREG(23, NET_TX, WR, Area buf);
AM_DEVREG(24, NET_RX, WR, Area buf);
// Input
#define AM_KEYS(_) \
_(ESCAPE) _(F1) _(F2) _(F3) _(F4) _(F5) _(F6) _(F7) _(F8) _(F9) _(F10) _(F11) _(F12) \
_(GRAVE) _(1) _(2) _(3) _(4) _(5) _(6) _(7) _(8) _(9) _(0) _(MINUS) _(EQUALS) _(BACKSPACE) \
_(TAB) _(Q) _(W) _(E) _(R) _(T) _(Y) _(U) _(I) _(O) _(P) _(LEFTBRACKET) _(RIGHTBRACKET) _(BACKSLASH) \
_(CAPSLOCK) _(A) _(S) _(D) _(F) _(G) _(H) _(J) _(K) _(L) _(SEMICOLON) _(APOSTROPHE) _(RETURN) \
_(LSHIFT) _(Z) _(X) _(C) _(V) _(B) _(N) _(M) _(COMMA) _(PERIOD) _(SLASH) _(RSHIFT) \
_(LCTRL) _(APPLICATION) _(LALT) _(SPACE) _(RALT) _(RCTRL) \
_(UP) _(DOWN) _(LEFT) _(RIGHT) _(INSERT) _(DELETE) _(HOME) _(END) _(PAGEUP) _(PAGEDOWN)
#define AM_KEY_NAMES(key) AM_KEY_##key,
enum {
AM_KEY_NONE = 0,
AM_KEYS(AM_KEY_NAMES)
};
// GPU
#define AM_GPU_TEXTURE 1
#define AM_GPU_SUBTREE 2
#define AM_GPU_NULL 0xffffffff
typedef uint32_t gpuptr_t;
struct gpu_texturedesc {
uint16_t w, h;
gpuptr_t pixels;
} __attribute__((packed));
struct gpu_canvas {
uint16_t type, w, h, x1, y1, w1, h1;
gpuptr_t sibling;
union {
gpuptr_t child;
struct gpu_texturedesc texture;
};
} __attribute__((packed));
#endif

16
abstract-machine/am/include/arch/loongarch32r-nemu.h Normal file
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#ifndef __ARCH_H__
#define __ARCH_H__
struct Context {
// TODO: fix the order of these members to match trap.S
uintptr_t gpr[32], era, estat, prmd;
void *pdir;
};
#define GPR1 gpr[11] // a7
#define GPR2 gpr[0]
#define GPR3 gpr[0]
#define GPR4 gpr[0]
#define GPRx gpr[0]
#endif

16
abstract-machine/am/include/arch/mips32-nemu.h Normal file
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#ifndef __ARCH_H__
#define __ARCH_H__
struct Context {
// TODO: fix the order of these members to match trap.S
uintptr_t hi, gpr[32], epc, cause, lo, status;
void *pdir;
};
#define GPR1 gpr[2] // v0
#define GPR2 gpr[0]
#define GPR3 gpr[0]
#define GPR4 gpr[0]
#define GPRx gpr[0]
#endif

26
abstract-machine/am/include/arch/native.h Normal file
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#ifndef ARCH_H__
#define ARCH_H__
#ifndef __USE_GNU
# define __USE_GNU
#endif
#include <ucontext.h>
struct Context {
uintptr_t ksp;
void *vm_head;
ucontext_t uc;
// skip the red zone of the stack frame, see the amd64 ABI manual for details
uint8_t redzone[128];
};
#define GPR1 uc.uc_mcontext.gregs[REG_RDI]
#define GPR2 uc.uc_mcontext.gregs[REG_RSI]
#define GPR3 uc.uc_mcontext.gregs[REG_RDX]
#define GPR4 uc.uc_mcontext.gregs[REG_RCX]
#define GPRx uc.uc_mcontext.gregs[REG_RAX]
#undef __USE_GNU
#endif

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abstract-machine/am/include/arch/riscv.h Normal file
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#ifndef ARCH_H__
#define ARCH_H__
#ifdef __riscv_e
#define NR_REGS 16
#else
#define NR_REGS 32
#endif
struct Context {
// TODO: fix the order of these members to match trap.S
uintptr_t mepc, mcause, gpr[NR_REGS], mstatus;
void *pdir;
};
#ifdef __riscv_e
#define GPR1 gpr[15] // a5
#else
#define GPR1 gpr[17] // a7
#endif
#define GPR2 gpr[0]
#define GPR3 gpr[0]
#define GPR4 gpr[0]
#define GPRx gpr[0]
#endif

17
abstract-machine/am/include/arch/x86-nemu.h Normal file
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#ifndef ARCH_H__
#define ARCH_H__
struct Context {
// TODO: fix the order of these members to match trap.S
uintptr_t esi, ebx, eax, eip, edx, eflags, ecx, cs, esp, edi, ebp;
void *cr3;
int irq;
};
#define GPR1 eax
#define GPR2 eip
#define GPR3 eip
#define GPR4 eip
#define GPRx eip
#endif

17
abstract-machine/am/include/arch/x86-qemu.h Normal file
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#ifndef ARCH_H__
#define ARCH_H__
struct Context {
void *cr3;
uint32_t ds, eax, ebx, ecx, edx,
esp0, esi, edi, ebp,
eip, cs, eflags, esp, ss3;
};
#define GPR1 eax
#define GPR2 ebx
#define GPR3 ecx
#define GPR4 edx
#define GPRx eax
#endif

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abstract-machine/am/include/arch/x86_64-qemu.h Normal file
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#ifndef ARCH_H__
#define ARCH_H__
struct Context {
void *cr3;
uint64_t rax, rbx, rcx, rdx,
rbp, rsi, rdi,
r8, r9, r10, r11,
r12, r13, r14, r15,
rip, cs, rflags,
rsp, ss, rsp0;
};
#define GPR1 rdi
#define GPR2 rsi
#define GPR3 rdx
#define GPR4 rcx
#define GPRx rax
#endif