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> sim RTL

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ysyx_22040000 李心杨
Linux calcite 6.1.65 #1-NixOS SMP PREEMPT_DYNAMIC Sun Dec  3 06:32:13 UTC 2023 x86_64 GNU/Linux
 19:41:15  up  22:39,  2 users,  load average: 0.63, 0.51, 0.55
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tracer-ysyx 2023-12-23 19:41:15 +08:00 • committed by xinyangli
parent a2204cebed
commit 8303b1d6fe
15 changed files with 3 additions and 860 deletions
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6
npc/Makefile
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@ -1,6 +1,6 @@
VSRC := $(wildcard vsrc/*.v)
CPPSRC := $(wildcard csrc/*.cpp)
PREFIX ?= .
CPPSRC := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
PREFIX ?= build
OBJDIR := $(PREFIX)/obj
all: $(OBJDIR)
@ -8,7 +8,7 @@ all: $(OBJDIR)
sim: all
$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
@echo "Write this Makefile by your self."
@echo "Running" $(OBJDIR)/Vexample
$(OBJDIR)/Vexample