From f198eb6073383c1e0a5201be42b43c609082264e Mon Sep 17 00:00:00 2001 From: Zihao Yu Date: Fri, 3 Nov 2023 16:07:10 +0800 Subject: [PATCH] riscv,nemu,trap: fix wrong register number --- am/src/riscv/nemu/trap.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/am/src/riscv/nemu/trap.S b/am/src/riscv/nemu/trap.S index 5ec275a..05d4957 100644 --- a/am/src/riscv/nemu/trap.S +++ b/am/src/riscv/nemu/trap.S @@ -31,7 +31,7 @@ f(30) f(31) #define PUSH(n) STORE concat(x, n), (n * XLEN)(sp); #define POP(n) LOAD concat(x, n), (n * XLEN)(sp); -#define CONTEXT_SIZE ((NR_REGS + 3 + 1) * XLEN) +#define CONTEXT_SIZE ((NR_REGS + 3) * XLEN) #define OFFSET_SP ( 2 * XLEN) #define OFFSET_CAUSE ((NR_REGS + 0) * XLEN) #define OFFSET_STATUS ((NR_REGS + 1) * XLEN)