ready for ics2021

am/include/arch/mips32-nemu.h

@@ -2,6 +2,7 @@
 #define __ARCH_H__
 
 struct Context {
+  // TODO: fix the order of these members to match trap.S
   uintptr_t hi, gpr[32], epc, cause, lo, status;
   void *pdir;
 };

am/include/arch/riscv32-nemu.h

@@ -2,7 +2,8 @@
 #define ARCH_H__
 
 struct Context {
-  uintptr_t epc, cause, gpr[32], status;
+  // TODO: fix the order of these members to match trap.S
+  uintptr_t mepc, mcause, gpr[32], mstatus;
   void *pdir;
 };
 

am/include/arch/riscv64-mycpu.h

@@ -3,14 +3,12 @@
 
 struct Context {
   // TODO: fix the order of these members to match trap.S
-  uintptr_t epc, cause, gpr[32], status;
+  uintptr_t mepc, mcause, gpr[32], mstatus;
 };
 
-#define GPR1 gpr[0]
+#define GPR1 gpr[17] // a7
 #define GPR2 gpr[0]
 #define GPR3 gpr[0]
 #define GPR4 gpr[0]
 #define GPRx gpr[0]
-
 #endif
-

am/include/arch/riscv64-nemu.h

@@ -2,7 +2,8 @@
 #define ARCH_H__
 
 struct Context {
-  uintptr_t epc, cause, gpr[32], status;
+  // TODO: fix the order of these members to match trap.S
+  uintptr_t mepc, mcause, gpr[32], mstatus;
   void *pdir;
 };
 
@@ -11,5 +12,4 @@ struct Context {
 #define GPR3 gpr[0]
 #define GPR4 gpr[0]
 #define GPRx gpr[0]
-
 #endif

am/include/arch/spike.h

@@ -2,6 +2,13 @@
 #define ARCH_H__
 
 struct Context {
+  uintptr_t gpr[1];
 };
 
+#define GPR1 gpr[0]
+#define GPR2 gpr[0]
+#define GPR3 gpr[0]
+#define GPR4 gpr[0]
+#define GPRx gpr[0]
+
 #endif

am/include/arch/x86-nemu.h

@@ -2,6 +2,7 @@
 #define ARCH_H__
 
 struct Context {
+  // TODO: fix the order of these members to match trap.S
   uintptr_t esi, ebx, eax, eip, edx, eflags, ecx, cs, esp, edi, ebp;
   void *cr3;
   int irq;

am/src/mips/nemu/cte.c

@@ -1,5 +1,5 @@
 #include <am.h>
-#include <mips32.h>
+#include <mips/mips32.h>
 #include <klib.h>
 
 static Context* (*user_handler)(Event, Context*) = NULL;

am/src/mips/nemu/vme.c

@@ -1,5 +1,4 @@
 #include <am.h>
-#include <mips32.h>
 #include <nemu.h>
 
 #define USER_SPACE RANGE(0x40000000, 0x80000000)

am/src/native/ioe.c

@@ -8,6 +8,7 @@ void __am_timer_init();
 void __am_gpu_init();
 void __am_input_init();
 void __am_audio_init();
+void __am_disk_init();
 void __am_input_config(AM_INPUT_CONFIG_T *);
 void __am_timer_config(AM_TIMER_CONFIG_T *);
 void __am_timer_rtc(AM_TIMER_RTC_T *);
@@ -20,8 +21,10 @@ void __am_audio_config(AM_AUDIO_CONFIG_T *);
 void __am_audio_ctrl(AM_AUDIO_CTRL_T *);
 void __am_audio_status(AM_AUDIO_STATUS_T *);
 void __am_audio_play(AM_AUDIO_PLAY_T *);
+void __am_disk_config(AM_DISK_CONFIG_T *cfg);
+void __am_disk_status(AM_DISK_STATUS_T *stat);
+void __am_disk_blkio(AM_DISK_BLKIO_T *io);
 static void __am_uart_config(AM_UART_CONFIG_T *cfg)   { cfg->present = false; }
-static void __am_disk_config(AM_DISK_CONFIG_T *cfg)   { cfg->present = false; }
 static void __am_net_config (AM_NET_CONFIG_T *cfg)    { cfg->present = false; }
 
 typedef void (*handler_t)(void *buf);
@@ -40,6 +43,8 @@ static void *lut[128] = {
   [AM_AUDIO_STATUS] = __am_audio_status,
   [AM_AUDIO_PLAY  ] = __am_audio_play,
   [AM_DISK_CONFIG ] = __am_disk_config,
+  [AM_DISK_STATUS ] = __am_disk_status,
+  [AM_DISK_BLKIO  ] = __am_disk_blkio,
   [AM_NET_CONFIG  ] = __am_net_config,
 };
 
@@ -59,6 +64,7 @@ void __am_ioe_init() {
   __am_gpu_init();
   __am_input_init();
   __am_audio_init();
+  __am_disk_init();
   ioe_init_done = true;
 }
 

am/src/native/ioe/disk.c

@@ -0,0 +1,41 @@
+#include <am.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <assert.h>
+
+#define BLKSZ 512
+
+static int disk_size = 0;
+static FILE *fp = NULL;
+
+void __am_disk_init() {
+  const char *diskimg = getenv("diskimg");
+  if (diskimg) {
+    fp = fopen(diskimg, "r+");
+    if (fp) {
+      fseek(fp, 0, SEEK_END);
+      disk_size = (ftell(fp) + 511) / 512;
+      rewind(fp);
+    }
+  }
+}
+
+void __am_disk_config(AM_DISK_CONFIG_T *cfg) {
+  cfg->present = (fp != NULL);
+  cfg->blksz = BLKSZ;
+  cfg->blkcnt = disk_size;
+}
+
+void __am_disk_status(AM_DISK_STATUS_T *stat) {
+  stat->ready = 1;
+}
+
+void __am_disk_blkio(AM_DISK_BLKIO_T *io) {
+  if (fp) {
+    fseek(fp, io->blkno * BLKSZ, SEEK_SET);
+    int ret;
+    if (io->write) ret = fwrite(io->buf, io->blkcnt * BLKSZ, 1, fp);
+    else ret = fread(io->buf, io->blkcnt * BLKSZ, 1, fp);
+    assert(ret == 1);
+  }
+}

am/src/nemu/isa/riscv32/trap.S

@@ -1,51 +0,0 @@
-
-#define concat_temp(x, y) x ## y
-#define concat(x, y) concat_temp(x, y)
-#define MAP(c, f) c(f)
-
-#define REGS(f) \
-      f( 1)       f( 3) f( 4) f( 5) f( 6) f( 7) f( 8) f( 9) \
-f(10) f(11) f(12) f(13) f(14) f(15) f(16) f(17) f(18) f(19) \
-f(20) f(21) f(22) f(23) f(24) f(25) f(26) f(27) f(28) f(29) \
-f(30) f(31)
-
-#define PUSH(n) sw concat(x, n), (n * 4)(sp);
-#define POP(n)  lw concat(x, n), (n * 4)(sp);
-
-#define CONTEXT_SIZE ((32 + 3) * 4)
-#define OFFSET_SP     ( 2 * 4)
-#define OFFSET_CAUSE  (32 * 4)
-#define OFFSET_STATUS (33 * 4)
-#define OFFSET_EPC    (34 * 4)
-
-.globl __am_asm_trap
-__am_asm_trap:
-  addi sp, sp, -CONTEXT_SIZE
-
-  MAP(REGS, PUSH)
-
-  mv t0, sp
-  addi t0, t0, CONTEXT_SIZE
-  sw t0, OFFSET_SP(sp)
-
-  csrr t0, scause
-  csrr t1, sstatus
-  csrr t2, sepc
-
-  sw t0, OFFSET_CAUSE(sp)
-  sw t1, OFFSET_STATUS(sp)
-  sw t2, OFFSET_EPC(sp)
-
-  mv a0, sp
-  jal __am_irq_handle
-
-  lw t1, OFFSET_STATUS(sp)
-  lw t2, OFFSET_EPC(sp)
-  csrw sstatus, t1
-  csrw sepc, t2
-
-  MAP(REGS, POP)
-
-  addi sp, sp, CONTEXT_SIZE
-
-  sret

am/src/nemu/isa/riscv32/vme.c

@@ -1,73 +0,0 @@
-#include <am.h>
-#include <nemu.h>
-#include <klib.h>
-
-static AddrSpace kas = {};
-static void* (*pgalloc_usr)(int) = NULL;
-static void (*pgfree_usr)(void*) = NULL;
-static int vme_enable = 0;
-
-static Area segments[] = {      // Kernel memory mappings
-  NEMU_PADDR_SPACE
-};
-
-#define USER_SPACE RANGE(0x40000000, 0x80000000)
-
-static inline void set_satp(void *pdir) {
-  asm volatile("csrw satp, %0" : : "r"(0x80000000 | ((uintptr_t)pdir >> 12)));
-}
-
-static inline uintptr_t get_satp() {
-  uintptr_t satp;
-  asm volatile("csrr %0, satp" : "=r"(satp));
-  return satp << 12;
-}
-
-bool vme_init(void* (*pgalloc_f)(int), void (*pgfree_f)(void*)) {
-  pgalloc_usr = pgalloc_f;
-  pgfree_usr = pgfree_f;
-
-  kas.ptr = pgalloc_f(PGSIZE);
-
-  int i;
-  for (i = 0; i < LENGTH(segments); i ++) {
-    void *va = segments[i].start;
-    for (; va < segments[i].end; va += PGSIZE) {
-      map(&kas, va, va, 0);
-    }
-  }
-
-  set_satp(kas.ptr);
-  vme_enable = 1;
-
-  return true;
-}
-
-void protect(AddrSpace *as) {
-  PTE *updir = (PTE*)(pgalloc_usr(PGSIZE));
-  as->ptr = updir;
-  as->area = USER_SPACE;
-  as->pgsize = PGSIZE;
-  // map kernel space
-  memcpy(updir, kas.ptr, PGSIZE);
-}
-
-void unprotect(AddrSpace *as) {
-}
-
-void __am_get_cur_as(Context *c) {
-  c->pdir = (vme_enable ? (void *)get_satp() : NULL);
-}
-
-void __am_switch(Context *c) {
-  if (vme_enable && c->pdir != NULL) {
-    set_satp(c->pdir);
-  }
-}
-
-void map(AddrSpace *as, void *va, void *pa, int prot) {
-}
-
-Context *ucontext(AddrSpace *as, Area kstack, void *entry) {
-  return NULL;
-}

am/src/nemu/isa/riscv64/cte.c

@@ -1,46 +0,0 @@
-#include <am.h>
-#include <nemu.h>
-#include <klib.h>
-
-static Context* (*user_handler)(Event, Context*) = NULL;
-
-Context* __am_irq_handle(Context *c) {
-  if (user_handler) {
-    Event ev = {0};
-    switch (c->cause) {
-      default: ev.event = EVENT_ERROR; break;
-    }
-
-    c = user_handler(ev, c);
-    assert(c != NULL);
-  }
-
-  return c;
-}
-
-extern void __am_asm_trap(void);
-
-bool cte_init(Context*(*handler)(Event, Context*)) {
-  // initialize exception entry
-  asm volatile("csrw stvec, %0" : : "r"(__am_asm_trap));
-
-  // register event handler
-  user_handler = handler;
-
-  return true;
-}
-
-Context *kcontext(Area kstack, void (*entry)(void *), void *arg) {
-  return NULL;
-}
-
-void yield() {
-  asm volatile("li a7, -1; ecall");
-}
-
-bool ienabled() {
-  return false;
-}
-
-void iset(bool enable) {
-}

am/src/nemu/isa/riscv64/trap.S

@@ -1,51 +0,0 @@
-
-#define concat_temp(x, y) x ## y
-#define concat(x, y) concat_temp(x, y)
-#define MAP(c, f) c(f)
-
-#define REGS(f) \
-      f( 1)       f( 3) f( 4) f( 5) f( 6) f( 7) f( 8) f( 9) \
-f(10) f(11) f(12) f(13) f(14) f(15) f(16) f(17) f(18) f(19) \
-f(20) f(21) f(22) f(23) f(24) f(25) f(26) f(27) f(28) f(29) \
-f(30) f(31)
-
-#define PUSH(n) sd concat(x, n), (n * 8)(sp);
-#define POP(n)  ld concat(x, n), (n * 8)(sp);
-
-#define CONTEXT_SIZE ((32 + 3) * 8)
-#define OFFSET_SP     ( 2 * 8)
-#define OFFSET_CAUSE  (32 * 8)
-#define OFFSET_STATUS (33 * 8)
-#define OFFSET_EPC    (34 * 8)
-
-.globl __am_asm_trap
-__am_asm_trap:
-  addi sp, sp, -CONTEXT_SIZE
-
-  MAP(REGS, PUSH)
-
-  mv t0, sp
-  addi t0, t0, CONTEXT_SIZE
-  sd t0, OFFSET_SP(sp)
-
-  csrr t0, scause
-  csrr t1, sstatus
-  csrr t2, sepc
-
-  sd t0, OFFSET_CAUSE(sp)
-  sd t1, OFFSET_STATUS(sp)
-  sd t2, OFFSET_EPC(sp)
-
-  mv a0, sp
-  jal __am_irq_handle
-
-  ld t1, OFFSET_STATUS(sp)
-  ld t2, OFFSET_EPC(sp)
-  csrw sstatus, t1
-  csrw sepc, t2
-
-  MAP(REGS, POP)
-
-  addi sp, sp, CONTEXT_SIZE
-
-  sret

am/src/platform/nemu/include/nemu.h

@@ -3,7 +3,8 @@
 
 #include <klib-macros.h>
 
-#include ISA_H // "x86.h", "mips32.h", ...
+#include ISA_H // the macro `ISA_H` is defined in CFLAGS
+               // it will be expanded as "x86/x86.h", "mips/mips32.h", ...
 
 #if defined(__ISA_X86__)
 # define nemu_trap(code) asm volatile (".byte 0xd6" : :"a"(code))
@@ -15,22 +16,22 @@
 # error unsupported ISA __ISA__
 #endif
 
-#ifdef __ARCH_X86_NEMU
-# define SERIAL_PORT  0x3f8
-# define KBD_ADDR     0x60
-# define RTC_ADDR     0x48
-# define VGACTL_ADDR  0x100
-# define AUDIO_ADDR   0x200
+#if defined(__ARCH_X86_NEMU)
+# define DEVICE_BASE 0x0
 #else
-# define SERIAL_PORT  0xa10003f8
-# define KBD_ADDR     0xa1000060
-# define RTC_ADDR     0xa1000048
-# define VGACTL_ADDR  0xa1000100
-# define AUDIO_ADDR   0xa1000200
+# define DEVICE_BASE 0xa0000000
 #endif
 
-#define FB_ADDR         0xa0000000
-#define AUDIO_SBUF_ADDR 0xa0800000
+#define MMIO_BASE 0xa0000000
+
+#define SERIAL_PORT     (DEVICE_BASE + 0x00003f8)
+#define KBD_ADDR        (DEVICE_BASE + 0x0000060)
+#define RTC_ADDR        (DEVICE_BASE + 0x0000048)
+#define VGACTL_ADDR     (DEVICE_BASE + 0x0000100)
+#define AUDIO_ADDR      (DEVICE_BASE + 0x0000200)
+#define DISK_ADDR       (DEVICE_BASE + 0x0000300)
+#define FB_ADDR         (MMIO_BASE   + 0x1000000)
+#define AUDIO_SBUF_ADDR (MMIO_BASE   + 0x1200000)
 
 extern char _pmem_start;
 #define PMEM_SIZE (128 * 1024 * 1024)
@@ -38,7 +39,7 @@ extern char _pmem_start;
 #define NEMU_PADDR_SPACE \
   RANGE(&_pmem_start, PMEM_END), \
   RANGE(FB_ADDR, FB_ADDR + 0x200000), \
-  RANGE(0xa1000000, 0xa1000000 + 0x1000) /* serial, rtc, screen, keyboard */
+  RANGE(MMIO_BASE, MMIO_BASE + 0x1000) /* serial, rtc, screen, keyboard */
 
 typedef uintptr_t PTE;
 

am/src/platform/nemu/ioe/disk.c

@@ -0,0 +1,12 @@
+#include <am.h>
+#include <nemu.h>
+
+void __am_disk_config(AM_DISK_CONFIG_T *cfg) {
+  cfg->present = false;
+}
+
+void __am_disk_status(AM_DISK_STATUS_T *stat) {
+}
+
+void __am_disk_blkio(AM_DISK_BLKIO_T *io) {
+}

am/src/platform/nemu/ioe/ioe.c

@@ -14,11 +14,13 @@ void __am_audio_config(AM_AUDIO_CONFIG_T *);
 void __am_audio_ctrl(AM_AUDIO_CTRL_T *);
 void __am_audio_status(AM_AUDIO_STATUS_T *);
 void __am_audio_play(AM_AUDIO_PLAY_T *);
+void __am_disk_config(AM_DISK_CONFIG_T *cfg);
+void __am_disk_status(AM_DISK_STATUS_T *stat);
+void __am_disk_blkio(AM_DISK_BLKIO_T *io);
 
 static void __am_timer_config(AM_TIMER_CONFIG_T *cfg) { cfg->present = true; cfg->has_rtc = true; }
 static void __am_input_config(AM_INPUT_CONFIG_T *cfg) { cfg->present = true;  }
 static void __am_uart_config(AM_UART_CONFIG_T *cfg)   { cfg->present = false; }
-static void __am_disk_config(AM_DISK_CONFIG_T *cfg)   { cfg->present = false; }
 static void __am_net_config (AM_NET_CONFIG_T *cfg)    { cfg->present = false; }
 
 typedef void (*handler_t)(void *buf);
@@ -37,6 +39,8 @@ static void *lut[128] = {
   [AM_AUDIO_STATUS] = __am_audio_status,
   [AM_AUDIO_PLAY  ] = __am_audio_play,
   [AM_DISK_CONFIG ] = __am_disk_config,
+  [AM_DISK_STATUS ] = __am_disk_status,
+  [AM_DISK_BLKIO  ] = __am_disk_blkio,
   [AM_NET_CONFIG  ] = __am_net_config,
 };
 

am/src/riscv/mycpu/cte.c

@@ -6,7 +6,7 @@ static Context* (*user_handler)(Event, Context*) = NULL;
 Context* __am_irq_handle(Context *c) {
   if (user_handler) {
     Event ev = {0};
-    switch (c->cause) {
+    switch (c->mcause) {
       default: ev.event = EVENT_ERROR; break;
     }
 

am/src/riscv/nemu/cte.c

@@ -1,5 +1,5 @@
 #include <am.h>
-#include <riscv32.h>
+#include <riscv/riscv.h>
 #include <klib.h>
 
 static Context* (*user_handler)(Event, Context*) = NULL;
@@ -7,7 +7,7 @@ static Context* (*user_handler)(Event, Context*) = NULL;
 Context* __am_irq_handle(Context *c) {
   if (user_handler) {
     Event ev = {0};
-    switch (c->cause) {
+    switch (c->mcause) {
       default: ev.event = EVENT_ERROR; break;
     }
 
@@ -22,7 +22,7 @@ extern void __am_asm_trap(void);
 
 bool cte_init(Context*(*handler)(Event, Context*)) {
   // initialize exception entry
-  asm volatile("csrw stvec, %0" : : "r"(__am_asm_trap));
+  asm volatile("csrw mtvec, %0" : : "r"(__am_asm_trap));
 
   // register event handler
   user_handler = handler;

am/src/riscv/nemu/trap.S

@@ -0,0 +1,61 @@
+#define concat_temp(x, y) x ## y
+#define concat(x, y) concat_temp(x, y)
+#define MAP(c, f) c(f)
+
+#if __riscv_xlen == 32
+#define LOAD  lw
+#define STORE sw
+#define XLEN  4
+#else
+#define LOAD  ld
+#define STORE sd
+#define XLEN  8
+#endif
+
+#define REGS(f) \
+      f( 1)       f( 3) f( 4) f( 5) f( 6) f( 7) f( 8) f( 9) \
+f(10) f(11) f(12) f(13) f(14) f(15) f(16) f(17) f(18) f(19) \
+f(20) f(21) f(22) f(23) f(24) f(25) f(26) f(27) f(28) f(29) \
+f(30) f(31)
+
+#define PUSH(n) STORE concat(x, n), (n * XLEN)(sp);
+#define POP(n)  LOAD  concat(x, n), (n * XLEN)(sp);
+
+#define CONTEXT_SIZE  ((32 + 3 + 1) * XLEN)
+#define OFFSET_SP     ( 2 * XLEN)
+#define OFFSET_CAUSE  (32 * XLEN)
+#define OFFSET_STATUS (33 * XLEN)
+#define OFFSET_EPC    (34 * XLEN)
+
+.align 3
+.globl __am_asm_trap
+__am_asm_trap:
+  addi sp, sp, -CONTEXT_SIZE
+
+  MAP(REGS, PUSH)
+
+  csrr t0, mcause
+  csrr t1, mstatus
+  csrr t2, mepc
+
+  STORE t0, OFFSET_CAUSE(sp)
+  STORE t1, OFFSET_STATUS(sp)
+  STORE t2, OFFSET_EPC(sp)
+
+  # set mstatus.MPRV to pass difftest
+  li a0, (1 << 17)
+  or t1, t1, a0
+  csrw mstatus, t1
+
+  mv a0, sp
+  jal __am_irq_handle
+
+  LOAD t1, OFFSET_STATUS(sp)
+  LOAD t2, OFFSET_EPC(sp)
+  csrw mstatus, t1
+  csrw mepc, t2
+
+  MAP(REGS, POP)
+
+  addi sp, sp, CONTEXT_SIZE
+  mret

am/src/riscv/nemu/vme.c

@@ -14,7 +14,7 @@ static Area segments[] = {      // Kernel memory mappings
 #define USER_SPACE RANGE(0x40000000, 0x80000000)
 
 static inline void set_satp(void *pdir) {
-  uintptr_t mode = 8ull << 60;
+  uintptr_t mode = 1ul << (__riscv_xlen - 1);
   asm volatile("csrw satp, %0" : : "r"(mode | ((uintptr_t)pdir >> 12)));
 }
 

am/src/riscv/riscv.h

@@ -1,5 +1,5 @@
-#ifndef RISCV32_H__
-#define RISCV32_H__
+#ifndef RISCV_H__
+#define RISCV_H__
 
 #include <stdint.h>
 
@@ -16,5 +16,19 @@ static inline void outl(uintptr_t addr, uint32_t data) { *(volatile uint32_t *)a
 #define PTE_W 0x04
 #define PTE_X 0x08
 #define PTE_U 0x10
+#define PTE_A 0x40
+#define PTE_D 0x80
+
+enum { MODE_U, MODE_S, MODE_M = 3 };
+#define MSTATUS_MXR  (1 << 19)
+#define MSTATUS_SUM  (1 << 18)
+
+#if __riscv_xlen == 64
+#define MSTATUS_SXL  (2ull << 34)
+#define MSTATUS_UXL  (2ull << 32)
+#else
+#define MSTATUS_SXL  0
+#define MSTATUS_UXL  0
+#endif
 
 #endif

am/src/riscv64.h

@@ -1,20 +0,0 @@
-#ifndef RISCV64_H__
-#define RISCV64_H__
-
-#include <stdint.h>
-
-static inline uint8_t  inb(uintptr_t addr) { return *(volatile uint8_t  *)addr; }
-static inline uint16_t inw(uintptr_t addr) { return *(volatile uint16_t *)addr; }
-static inline uint32_t inl(uintptr_t addr) { return *(volatile uint32_t *)addr; }
-
-static inline void outb(uintptr_t addr, uint8_t  data) { *(volatile uint8_t  *)addr = data; }
-static inline void outw(uintptr_t addr, uint16_t data) { *(volatile uint16_t *)addr = data; }
-static inline void outl(uintptr_t addr, uint32_t data) { *(volatile uint32_t *)addr = data; }
-
-#define PTE_V 0x01
-#define PTE_R 0x02
-#define PTE_W 0x04
-#define PTE_X 0x08
-#define PTE_U 0x10
-
-#endif

am/src/spike/start.S

@@ -1,8 +0,0 @@
-.section entry, "ax"
-.globl _start
-.type _start, @function
-
-_start:
-  mv s0, zero
-  la sp, _stack_pointer
-  jal _trm_init

am/src/x86/nemu/cte.c

@@ -1,5 +1,5 @@
 #include <am.h>
-#include <x86.h>
+#include <x86/x86.h>
 #include <klib.h>
 
 #define NR_IRQ         256     // IDT size

am/src/x86/qemu/boot/main.c

@@ -1,6 +1,6 @@
 #include <stdint.h>
 #include <elf.h>
-#include <x86.h>
+#include <x86/x86.h>
 
 #define SECTSIZE 512
 #define ARGSIZE  1024

am/src/x86/qemu/start64.S

@@ -1,4 +1,4 @@
-#include <x86.h>
+#include <x86/x86.h>
 #include "x86-qemu.h"
 
 .code32

am/src/x86/qemu/x86-qemu.h

@@ -1,4 +1,4 @@
-#include <x86.h>
+#include <x86/x86.h>
 
 #define PML4_ADDR  0x1000
 #define PDPT_ADDR  0x2000