add riscv64-nemu
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parent
e4e5d03fa6
commit
11059d5b6f
11 changed files with 227 additions and 2 deletions
am
include/arch
src
scripts
15
am/include/arch/riscv64-nemu.h
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15
am/include/arch/riscv64-nemu.h
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@ -0,0 +1,15 @@
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#ifndef ARCH_H__
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#define ARCH_H__
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struct Context {
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uintptr_t epc, cause, gpr[32], status;
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void *pdir;
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};
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#define GPR1 gpr[17] // a7
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#define GPR2 gpr[0]
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#define GPR3 gpr[0]
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#define GPR4 gpr[0]
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#define GPRx gpr[0]
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#endif
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@ -9,7 +9,7 @@
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# define nemu_trap(code) asm volatile (".byte 0xd6" : :"a"(code))
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#elif defined(__ISA_MIPS32__)
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# define nemu_trap(code) asm volatile ("move $v0, %0; .word 0xf0000000" : :"r"(code))
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#elif defined(__ISA_RISCV32__)
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#elif defined(__ISA_RISCV32__) || defined(__ISA_RISCV64__)
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# define nemu_trap(code) asm volatile("mv a0, %0; .word 0x0000006b" : :"r"(code))
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#elif
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# error unsupported ISA __ISA__
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4
am/src/nemu/isa/riscv64/boot/loader.ld
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4
am/src/nemu/isa/riscv64/boot/loader.ld
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@ -0,0 +1,4 @@
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_pmem_start = 0x80000000;
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/* at $(AM_HOME)/am/src/nemu/scripts/section.ld */
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INCLUDE "section.ld"
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8
am/src/nemu/isa/riscv64/boot/start.S
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8
am/src/nemu/isa/riscv64/boot/start.S
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@ -0,0 +1,8 @@
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.section entry, "ax"
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.globl _start
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.type _start, @function
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_start:
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mv s0, zero
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la sp, _stack_pointer
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jal _trm_init
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46
am/src/nemu/isa/riscv64/cte.c
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46
am/src/nemu/isa/riscv64/cte.c
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#include <am.h>
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#include <nemu.h>
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#include <klib.h>
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static Context* (*user_handler)(Event, Context*) = NULL;
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Context* __am_irq_handle(Context *c) {
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if (user_handler) {
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Event ev = {0};
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switch (c->cause) {
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default: ev.event = EVENT_ERROR; break;
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}
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c = user_handler(ev, c);
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assert(c != NULL);
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}
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return c;
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}
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extern void __am_asm_trap(void);
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bool cte_init(Context*(*handler)(Event, Context*)) {
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// initialize exception entry
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asm volatile("csrw stvec, %0" : : "r"(__am_asm_trap));
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// register event handler
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user_handler = handler;
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return true;
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}
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Context *kcontext(Area kstack, void (*entry)(void *), void *arg) {
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return NULL;
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}
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void yield() {
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asm volatile("li a7, -1; ecall");
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}
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bool ienabled() {
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return false;
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}
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void iset(bool enable) {
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}
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51
am/src/nemu/isa/riscv64/trap.S
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51
am/src/nemu/isa/riscv64/trap.S
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@ -0,0 +1,51 @@
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#define concat_temp(x, y) x ## y
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#define concat(x, y) concat_temp(x, y)
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#define MAP(c, f) c(f)
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#define REGS(f) \
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f( 1) f( 3) f( 4) f( 5) f( 6) f( 7) f( 8) f( 9) \
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f(10) f(11) f(12) f(13) f(14) f(15) f(16) f(17) f(18) f(19) \
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f(20) f(21) f(22) f(23) f(24) f(25) f(26) f(27) f(28) f(29) \
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f(30) f(31)
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#define PUSH(n) sd concat(x, n), (n * 8)(sp);
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#define POP(n) ld concat(x, n), (n * 8)(sp);
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#define CONTEXT_SIZE ((32 + 3) * 8)
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#define OFFSET_SP ( 2 * 8)
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#define OFFSET_CAUSE (32 * 8)
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#define OFFSET_STATUS (33 * 8)
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#define OFFSET_EPC (34 * 8)
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.globl __am_asm_trap
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__am_asm_trap:
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addi sp, sp, -CONTEXT_SIZE
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MAP(REGS, PUSH)
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mv t0, sp
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addi t0, t0, CONTEXT_SIZE
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sd t0, OFFSET_SP(sp)
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csrr t0, scause
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csrr t1, sstatus
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csrr t2, sepc
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sd t0, OFFSET_CAUSE(sp)
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sd t1, OFFSET_STATUS(sp)
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sd t2, OFFSET_EPC(sp)
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mv a0, sp
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jal __am_irq_handle
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ld t1, OFFSET_STATUS(sp)
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ld t2, OFFSET_EPC(sp)
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csrw sstatus, t1
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csrw sepc, t2
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MAP(REGS, POP)
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addi sp, sp, CONTEXT_SIZE
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sret
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74
am/src/nemu/isa/riscv64/vme.c
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74
am/src/nemu/isa/riscv64/vme.c
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#include <am.h>
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#include <nemu.h>
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#include <klib.h>
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static AddrSpace kas = {};
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static void* (*pgalloc_usr)(int) = NULL;
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static void (*pgfree_usr)(void*) = NULL;
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static int vme_enable = 0;
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static Area segments[] = { // Kernel memory mappings
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NEMU_PADDR_SPACE
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};
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#define USER_SPACE RANGE(0x40000000, 0x80000000)
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static inline void set_satp(void *pdir) {
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uintptr_t mode = 8ull << 60;
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asm volatile("csrw satp, %0" : : "r"(mode | ((uintptr_t)pdir >> 12)));
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}
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static inline uintptr_t get_satp() {
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uintptr_t satp;
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asm volatile("csrr %0, satp" : "=r"(satp));
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return satp << 12;
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}
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bool vme_init(void* (*pgalloc_f)(int), void (*pgfree_f)(void*)) {
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pgalloc_usr = pgalloc_f;
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pgfree_usr = pgfree_f;
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kas.ptr = pgalloc_f(PGSIZE);
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int i;
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for (i = 0; i < LENGTH(segments); i ++) {
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void *va = segments[i].start;
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for (; va < segments[i].end; va += PGSIZE) {
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map(&kas, va, va, 0);
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}
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}
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set_satp(kas.ptr);
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vme_enable = 1;
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return true;
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}
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void protect(AddrSpace *as) {
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PTE *updir = (PTE*)(pgalloc_usr(PGSIZE));
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as->ptr = updir;
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as->area = USER_SPACE;
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as->pgsize = PGSIZE;
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// map kernel space
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memcpy(updir, kas.ptr, PGSIZE);
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}
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void unprotect(AddrSpace *as) {
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}
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void __am_get_cur_as(Context *c) {
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c->pdir = (vme_enable ? (void *)get_satp() : NULL);
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}
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void __am_switch(Context *c) {
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if (vme_enable && c->pdir != NULL) {
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set_satp(c->pdir);
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}
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}
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void map(AddrSpace *as, void *va, void *pa, int prot) {
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}
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Context *ucontext(AddrSpace *as, Area kstack, void *entry) {
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return NULL;
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}
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@ -12,6 +12,6 @@ int cpu_current() {
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return 0;
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}
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int atomic_xchg(int *addr, intptr_t newval) {
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int atomic_xchg(int *addr, int newval) {
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return 0;
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}
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20
am/src/riscv64.h
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20
am/src/riscv64.h
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#ifndef RISCV64_H__
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#define RISCV64_H__
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#include <stdint.h>
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static inline uint8_t inb(uintptr_t addr) { return *(volatile uint8_t *)addr; }
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static inline uint16_t inw(uintptr_t addr) { return *(volatile uint16_t *)addr; }
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static inline uint32_t inl(uintptr_t addr) { return *(volatile uint32_t *)addr; }
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static inline void outb(uintptr_t addr, uint8_t data) { *(volatile uint8_t *)addr = data; }
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static inline void outw(uintptr_t addr, uint16_t data) { *(volatile uint16_t *)addr = data; }
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static inline void outl(uintptr_t addr, uint32_t data) { *(volatile uint32_t *)addr = data; }
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#define PTE_V 0x01
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#define PTE_R 0x02
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#define PTE_W 0x04
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#define PTE_X 0x08
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#define PTE_U 0x10
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#endif
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5
scripts/isa/riscv64.mk
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5
scripts/isa/riscv64.mk
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CROSS_COMPILE := riscv64-linux-gnu-
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COMMON_FLAGS := -fno-pic -march=rv64g -mcmodel=medany
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CFLAGS += $(COMMON_FLAGS) -static
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ASFLAGS += $(COMMON_FLAGS) -O0
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LDFLAGS += -melf64lriscv
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2
scripts/riscv64-nemu.mk
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2
scripts/riscv64-nemu.mk
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include $(AM_HOME)/scripts/isa/riscv64.mk
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include $(AM_HOME)/scripts/platform/nemu.mk
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